一种面向航天器综合电子的ASIC芯片设计 | |
Alternative Title | Design of an ASIC Chip for Spacecraft Integrated Avionics |
周莉; 安军社; 方青文; 蔡飞 | |
Department | 空间技术部 |
Source Publication | 空间科学学报
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2014 | |
Volume | 34Issue:4Pages:497-504 |
ISSN | 0254-6124 |
Language | 中文 |
Keyword | 航天器综合电子系统 数据管理系统 Asic芯片 Mil-std-1553b总线 遥测遥控 |
Abstract | 航天器综合电子系统通用功能集成并芯片化是目前航天器电子系统的发展趋势.针对中国航天器电子系统小型化、综合化的应用需求,提出一种面向航天器综合电子的ASIC芯片设计方案,分析了 ASIC芯片设计中的关键技术,包括芯片系统工作模式、IP核的开发应用、可靠性和低功耗设计,1553B简易终端控制模式是芯片的技术特色和典型应用.ASIC芯片的功能设计、系统仿真验证、FPGA验证和物理设计均已完成,进入流片状态.芯片的FPGA验证结果证明了芯片设计的有效性和可靠性.ASIC芯片旨在达到国军标548S的要求,应用场景是航天器内数据总线接口单元和遥测遥控. |
Other Abstract | It is a trend to put the common spacecraft engineering requirements into one chip, which can miniaturize spacecraft avionics and reduce the repeated work for spacecraft engineers. Based on the analysis of space application requirements, the system design of an ASIC (Application Specific Integrated Circuit) chip for spacecraft telemetry and command system is proposed. Firstly, the chip system architecture is described. Secondly, four key techniques of the ASIC chip design are presented in detail, including design of the chip working modes, design of onchip IP cores, design of reliability, and the design of low power consumption technology. 1553B RT working mode of this ASIC is different and special from other space chips. The system test results based on FPGA show the validity and reliability of the ASIC system design. Finally, some promising applications of the ASIC chip are described. |
Indexed By | CSCD |
Citation statistics |
Cited Times:1[CSCD]
[CSCD Record]
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Document Type | 期刊论文 |
Identifier | http://ir.nssc.ac.cn/handle/122/4429 |
Collection | 空间技术部 |
Recommended Citation GB/T 7714 | 周莉,安军社,方青文,等. 一种面向航天器综合电子的ASIC芯片设计[J]. 空间科学学报,2014,34(4):497-504. |
APA | 周莉,安军社,方青文,&蔡飞.(2014).一种面向航天器综合电子的ASIC芯片设计.空间科学学报,34(4),497-504. |
MLA | 周莉,et al."一种面向航天器综合电子的ASIC芯片设计".空间科学学报 34.4(2014):497-504. |
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