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无缝坏块处理与流水编程的NAND型内存控制器设计与实现
Alternative TitleDesign and implement of a NAND Flash controller with pipelining program and non-missing invalid block handle method
闫梦婷; 安军社
Department空间技术部
Source Publication国防科技大学学报
2015
Volume37Issue:1Pages:53-58
ISSN1001-2486
Language中文
KeywordNand型内存控制器 固态存储器 坏块处理机制 流水存储机制
Abstract为满足航天大容量存储系统对高速存储及数据完整的需求,实现了一个基于NAND型内存的高性能控制器,提出了一种实现于NAND型内存芯片内部的流水编程机制,以及一种可以保证数据无缝连接的坏块处理机制。介绍了存储控制器的各个模块设计,并分析了不同情况编程机制所需的时间计算方法,建立仿真模型,利用蒙特卡洛方法仿真并讨论了流水编程机制的性能优化效果。在实际硬件平台验证了流水编程机制和坏块处理机制,结果表明该大容量存储系统的存储速率可达100MB/s,读取数据与存入数据保持一致,数据无乱序无丢失。
Other AbstractAiming at requirement of high speed and complete of data in space storage system, the design of a high performance NAND Flash controller is present. It concludes a pipelining-programming inside of NAND Flash chip and a non-missing invalid block method. The storage implementation is present. The calculation of storage time in different situation is discussed. The simulation modules are present and the impact of pipelining programming is simulated and discussed using Monte Carlo method. Practical application proves the pipelining programming and non-missing invalid block method. The operation frequency of storage system achieves to 100MB/s, ensuring accuracy, completeness and continuity of data.
Indexed ByEI ; CSCD
Citation statistics
Document Type期刊论文
Identifierhttp://ir.nssc.ac.cn/handle/122/4714
Collection空间技术部
Recommended Citation
GB/T 7714
闫梦婷,安军社. 无缝坏块处理与流水编程的NAND型内存控制器设计与实现[J]. 国防科技大学学报,2015,37(1):53-58.
APA 闫梦婷,&安军社.(2015).无缝坏块处理与流水编程的NAND型内存控制器设计与实现.国防科技大学学报,37(1),53-58.
MLA 闫梦婷,et al."无缝坏块处理与流水编程的NAND型内存控制器设计与实现".国防科技大学学报 37.1(2015):53-58.
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