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一种全数字BPSK解调器的设计与FPGA实现
Alternative TitleDesign and FPGA Implementation of All Digital BPSK Demodulator
张烨; 屈晨阳; 北京8701信箱
Department空间综合电子技术研究室
Source Publication微计算机信息
2009
Volume25Issue:8Pages:192-193,199
ISSN1008-0570
Language中文
Keyword突发通信 频差/相差估计 低信噪比 Fpga
Abstract介绍一种全数字BPSK解调器的设计及FPGA实现。该解调器采用前向开环的结构实现载波同步,与传统的闭环反馈结构相比,该解调器具有同步速度快,载波频差估计范围大等优点,尤其适合用于突发数字通信系统。测试结果表明,该解调器频差估计范围很大,可以达到符号速率的20%,抗噪声性能非常好,解调性能与理论值相比,损失小于0.5dB。
Other AbstractDesign and FPGA Implementation of an all digital BPSK demodulator.The demodulator has a feed forward structure.Com-pared to the traditional feedback structure,the demodulator has the advantages of rapid carrier synchronization and large frequency offset estimation range.The demodulator could attain good performance with burst digital transmission system.The hardware test re-sult shows that the frequency offset estimation range is large,about 20%of the symbol rate and its anti-noise performance is good,than loss is 0.5 dB compared with the theoretical value.
Funding Project中国科学院空间科学与应用研究中心
Document Type期刊论文
Identifierhttp://ir.nssc.ac.cn/handle/122/771
Collection空间技术部
Corresponding Author北京8701信箱
Recommended Citation
GB/T 7714
张烨,屈晨阳,北京8701信箱. 一种全数字BPSK解调器的设计与FPGA实现[J]. 微计算机信息,2009,25(8):192-193,199.
APA 张烨,屈晨阳,&北京8701信箱.(2009).一种全数字BPSK解调器的设计与FPGA实现.微计算机信息,25(8),192-193,199.
MLA 张烨,et al."一种全数字BPSK解调器的设计与FPGA实现".微计算机信息 25.8(2009):192-193,199.
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